Compact Sensor Device for Early Detection of Blockages in Intravenous (IV) Lines

Academic Program: Electrical Engineering

Purpose/Essence of the Project

Implementing an AES encryption system on an FPGA and adding protection against side-channel attacks using 3-share TI with a compact S-box, while minimizing the impact on the throughput of the encryption system. The system uses an efficient implementation of the S-box over the GF(2^8) field.

Describe the Product/Project

The project focuses on implementing an AES-based encryption system on an FPGA and verifying the encryption mechanism. This is followed by implementing AES using a 3-share TI technique with a compact S-box in order to protect the system against DPA/CPA side-channel attacks, while significantly reducing the performance degradation caused by the additional overhead of the protection mechanism.

If time and resources permit, we will also attempt to evaluate the system physically rather than only through simulations, using an attack setup that enables fault injection. This will allow an attacker to apply differential analysis techniques in an attempt to identify the secret key used by the system. Statistical analyses will then be performed to determine the appropriate parameters for fault injection.

How Was the Idea Born?

The idea was selected from the project pool and suggested by the supervisor.

Why Did You Choose This Project?

The project is interesting and challenging and involves FPGA technology at a highly advanced level, as well as cryptography and information security, which are highly relevant and constantly evolving fields. AES-based systems are also widely used in many applications. Acquiring knowledge in cryptography, together with experience in the complex field of circuit and hardware design, will provide the student with valuable practical skills in an important area of the industry and serve as an entry point into FPGA and hardware design.

Is the Project Connected with a Personal Story of Yours or of Someone You Know?

No.

What Need Does It Address and for What Population?

Security need: The project enables AES encryption on an FPGA with improved protection against attackers attempting to recover the encryption key through power consumption analysis.

Engineering/hardware need: The cost of using 3-share TI includes increased hardware area, power consumption, and implementation complexity, particularly because the S-box is non-linear and must be implemented using masking. Since the S-box is one of the most resource-intensive and sensitive components in AES, using a compact S-box reduces the required resources and enables DPA/CPA protection while limiting the impact on performance and hardware area.